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Industry¡¯s Broadest IP Portfolio for TSMC N3E Achieves First-Pass Silicon Success
17³Ô¹Ï is unleashing a new wave of advanced chip designs with the availability of its Interface and Foundation IP portfolio on the TSMC N3E FinFET process. With silicon success of the IP, high-performance computing, mobile, and multi-die system creators can use 17³Ô¹Ï' industry-leading IP to optimize power, performance, and area with confidence. TSMC's N3E process extends its 3nm family with enhanced power, performance and yield, meeting the demands of workload-intensive applications like high-performance computing, AI, and mobile. In addition, 17³Ô¹Ï IP for TSMC's N3E process offers a fast path to the new N3P process.
TSMC's and 17³Ô¹Ï' long history of collaboration to advance semiconductor innovation addresses the increasingly complex challenges of emerging applications. First-pass silicon success of 17³Ô¹Ï Interface IP using Foundation IP on the TSMC N3E process technology enables designers to reduce their integration risk and meet their stringent power, performance and area targets.
Key Benefits
First-Pass Silicon Success for 17³Ô¹Ï IP on TSMC N3E Process
17³Ô¹Ï UCIe PHY IP
The 17³Ô¹Ï¡¯ complete UCIe IP solution, including controller, PHY, verification IP, test, and emulation, enables robust and low-latency die-to-die connectivity for high-performance computing and automotive applications. 17³Ô¹Ï¡¯ UCIe link health monitoring, test and repair (MTR) controller helps to ensure reliable operation of multi-die systems during all phases of silicon lifecycle. 17³Ô¹Ï is an active member of the UCIe Consortium and is dedicated to helping customers jump start their multi-die system designs with our UCIe IP solution.?
17³Ô¹Ï 224G Ethernet PHY IP
The 17³Ô¹Ï 224G Ethernet PHY IP, an integral part of 17³Ô¹Ï¡¯ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency needs of high-performance data center applications. Using leading-edge design, analysis, simulation, and measurement techniques, the 17³Ô¹Ï 224G Ethernet PHY delivers exceptional signal integrity and jitter performance that exceeds the IEEE 802.3 and OIF standards electrical specifications.
17³Ô¹Ï Multi-Protocol 112G PHY IP LR-Max
The 17³Ô¹Ï Multi-Protocol 112G PHY IP on TSMC N3E is part of 17³Ô¹Ï¡¯ high performance multi-rate transceiver portfolio for high-end networking and high-performance computing applications. The 1-112Gbps PHY IP supports multiple electrical standards, including PCI Express 6.0, 400G/800G Ethernet, CCIX, CXL2.0/3.0, JESD204, CPRI and more. The placement-aware 112G PHY IP integrates seamlessly with the 17³Ô¹Ï MAC and PCS, delivering a complete 200G/400G/800G Ethernet solution.
17³Ô¹Ï LPDDR5X/5/4X
The 17³Ô¹Ï LPDDR5X/5/4X Controller on TSMC N3E is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5X, LPDDR5 and LPDDR4X SDRAMs. The 17³Ô¹Ï LPDDR5 Controller seamlessly integrates with the 17³Ô¹Ï Inline Memory Encryption (IME) Security Module to provide confidentiality of data in-use or stored in off-chip memory.?
17³Ô¹Ï DDR5 PHY IP
The 17³Ô¹Ï DDR5 PHY IP?on TSMC N3E supports JEDEC standard DDR5 SDRAMs and memory modules operating up to 8400Mbps servicing server, enterprise, AI, and networking applications. 17³Ô¹Ï DDR5 IP is part of the complete 17³Ô¹Ï DDR interface solution that includes PHY IPs, controllers, IME security modules, IP subsystems, verification IP, and IP prototyping kits.?
17³Ô¹Ï PCIe 5.0 PHY IP
The 17³Ô¹Ï PCIe 5.0 PHY IP on TSMC N3E is part of the complete solution for PCI Express PCIe 5.0 consisting of silicon-proven digital controllers, PHY IPs, integrity and data encryption (IDE) security modules, and verification IP. Our PHY IP enables real-time data connectivity with low-latency and high-performance for cloud computing, storage, and AI SoCs.
17³Ô¹Ï USB-C 3.2 / DisplayPort 1.4 IP
The 17³Ô¹Ï USB-C 3.2/DisplayPort 1.4 PHY IP on TSMC N3E is targeted for integration into SoCs that support connections to high-definition (HD), 2K, 4K, and 8K Ultra High Definition (UHD) display from mobile devices, set-top boxes and other applications requiring fast data transfers and output of high-resolution content. 17³Ô¹Ï offers complete solutions for USB/DisplayPort IP implementations, including PHY IPs, controllers with HDCP 2.3 security modules, verification IP, and IP subsystems to accelerate design cycles.
17³Ô¹Ï MIPI C-PHY IP/D-PHY IP
The 17³Ô¹Ï MIPI C-PHY IP/D-PHY IP on TSMC N3E enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for mobile, automotive, artificial intelligence (AI), and IoT applications. The PHY IP operates at 6.5Gb/s per lane and 6.5Gs/s per trio respectively for a maximum speed of 44.5Gb/s, and supports C-PHY IP v2.0 and D-PHY IP 2.1.
17³Ô¹Ï Foundation IP
17³Ô¹Ï Foundation IP for TSMC N3E process, including embedded memories and logic libraries, enables designers to achieve optimal power, performance, and area for their SoCs. 17³Ô¹Ï Foundation IP on TSMC process technologies is extensively proven in silicon with billions of units shipping in volume production, reducing design risk and speeding time-to-market.