17³Ô¹Ï USB 2.0 Digital Controller IP
17³Ô¹Ï provides designers with silicon-proven, configurable 17³Ô¹Ï USB 2.0 Controllers that are compliant with the USB-Implementers Forum (USB-IF) USB 2.0 specifications. The 17³Ô¹Ï digital controllers provide: the lowest gate count; power management optimized with dual power rails; and a ULPI interface for discrete PHYs and UTMI/UTMI+ interface for integrated PHYs. This comprehensive solution includes the USB 2.0 LPM-HSIC, OTG, Host and Device Controllers.
The 17³Ô¹Ï USB 2.0 IP is the most certified IP solution in the industry. With thousands of design wins and billions of silicon-proven units shipped, 17³Ô¹Ï' complete USB IP solution, consisting of digital controllers, PHY and Verification IP, enables designers to lower integration risk and speed time-to-market.
17³Ô¹Ï optimized the USB 2.0 Controllers for low power, small area and ease-of-integration, such as is required in Internet of Things (IoT) applications.
17³Ô¹Ï IP Prototyping Kit for USB 2.0 HS OTG 17³Ô¹Ï USB 2.0 Controller IP 17³Ô¹Ï USB Link Power Management and High Speed Inter-Chip Datasheet
- Configuration options to maximize performance and minimize CPU interrupts
- Flexible parameters enable easy integration into low and high-latency systems
- Transfer- or transaction-based processing of USB data based on system requirements
- Configurable data buffering options to fine-tune performance/ area trade-offs
- Buffer and descriptor pre-fetching maximizes host throughput
- Firmware-selectable endpoint configurations enable post-silicon application changes and the flexibility of one-chip design for multiple applications
- Quality IP is tested through extensive Constrained Random Verification
- AMBA? High-Performance Bus (AHB) interface enables rapid integration into ARM-based designs
- UTMI+ Level 3 enables rapid integration with compatible PHYs
- Hi-Speed (480 Mbps), Full-Speed (12 Mbps), and Low- Speed (1.5 Mbps) operation is compliant to the USB OTG Supplement
- The USB 2.0 HS OTG Controller operates as either peripheral or host
- The Hi-Speed USB EHCI Host Controller is also available
| USB 2.0 Device Controller version 4 with Active Clock Gating to save active power | STARs | Subscribe |
| USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface Supporting HSIC (config. as Device only or Full Speed only) | STARs | Subscribe |
| USB 2.0 Hi-Speed OTG Controller version 4 with Active Clock Gating to save active power | STARs | Subscribe |
| Description: | USB 2.0 Device Controller version 4 with Active Clock Gating to save active power |
| Name: | dwc_usb_2_0_device_v4 |
| Version: | 5.00b |
| ECCN: | 5E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Toolsets: | Qualified Toolsets |
| Download: | dw_iip_DWC_usb2_device |
| Product Code: | B854-0, B855-0, C436-0 |
| Description: | USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface Supporting HSIC (config. as Device only or Full Speed only) |
| Name: | dwc_usb_2_0_hs_otg_subsystem-ahb |
| Version: | 5.00b |
| ECCN: | 5E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Toolsets: | Qualified Toolsets |
| Download: | dw_iip_DWC_otg |
| Product Code: | 3884-0 |
| Description: | USB 2.0 Hi-Speed OTG Controller version 4 with Active Clock Gating to save active power |
| Name: | dwc_usb_2_0_hs_otg_v4 |
| Version: | 5.00b |
| ECCN: | 5E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Toolsets: | Qualified Toolsets |
| Download: | dw_iip_DWC_otg |
| Product Code: | C435-0 |