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Introduction to AMBA DTI

The Arm? AMBA? Distributed Translation Interface (DTI) protocols are used by implementations of Arm? System MMUv3 (SMMUv3) Architecture specifications, such as Arm MMUs.  Such MMU implementation consists of the following key components:

• Translation Control Unit (TCU)
• Translation Buffer Unit (TBU)
• PCI Express (PCIe) Root Port with Address Translation Services (ATS) support
• DTI interconnect that manages the communication across the above components

The DTI specification defines two protocols:

• DTI-TBU protocol: Defines communication between a TBU and a TCU
• DTI-ATS protocol: Defines communication between a PCIe root port and a TCU

for more details on the above components and related details. The DTI specification was first published in Nov 2016 and has undergone several revisions ever since, introducing newer versions of TBU and TCU protocols to support evolving Arm SMMU architectures. 

17³Ô¹Ï AMBA DTI-G VIP

17³Ô¹Ï VIP for DTI provides verification of design implementation based on all DTI specifications. With support for DTI-G, the 17³Ô¹Ï VIP provides an end-to-end verification solution and addresses design verification complexities through the following features:

• Support for protocol version 4.0 while maintaining backward compatibility for previous versions.
• Native System/Verilog UVM architecture which facilitates easy integration into simulation environments and speeds up the development of test benches.
• Performance analysis and comprehensive debug capabilities to check for functional correctness.
• In-built sequence collection, functional coverage model, and verification plans to expedite the verification process and ensure fast bring-up and achieve wholistic verification closure.
• Rich configurability options and built-in protocol checks to stay competitive in a market where protocol developments are already being adopted.

Conclusion

17³Ô¹Ï is partnering with early customers and collaborators to enhance the standard architecture for their next-generation designs, incorporating new features now available with the latest specifications. 

17³Ô¹Ï VIP is natively integrated with the?17³Ô¹Ï Verdi? Protocol Analyzer?debug solution as well as?17³Ô¹Ï Verdi? Performance Analyzer. Running system-level payload on SoCs requires a faster hardware-based pre-silicon solution. 17³Ô¹Ï transactors, memory models, hybrid and virtual solutions based on?17³Ô¹Ï IP?enable various verification and validation use-cases on the industry¡¯s fastest verification hardware,?17³Ô¹Ï ZeBu??emulation and?17³Ô¹Ï HAPS??prototyping systems. 

More information on 17³Ô¹Ï AMBA? VIP and Test Suites is available at?