2024-08-21 01:14:12
17³Ô¹Ï' DesignWare USB 3.1 PHY IP provides designers with the industry's best combination of low area and low power with support for the leading process technologies to 5nm. Both the USB-C 3.1 and USB 3.1 PHYs use a single efficient GDSII design that supports the SuperSpeedPlus (10 Gbps) and SuperSpeed (5 Gbps) speed modes. To maximize battery life in mobile applications, the DesignWare USB-C/USB 3.1 PHYs are designed to minimize power consumption and standby current. In addition, the DesignWare USB-C 3.1 femtoPHY is optimized to support the USB Type-C connectivity specification.
Industry¡¯s first PHY IP to support Type-C connectivity, the DesignWare USB/USB-C 3.1 PHYs,
offer clear margins at 10 Gbps USB 3.1 throughput.
17³Ô¹Ï DesignWare USB IP is the most certified USB IP solution in the industry. With over 3,000 design wins and approximately three billion silicon-proven units shipped, 17³Ô¹Ï' complete USB IP solution, consisting of digital controllers, PHYs, verification IP, IP Prototyping Kits and IP software development kits, enables designers to lower integration risk and speed time-to-market.
DesignWare SuperSpeed USB 3.1 IP Solution
Highlights
Products
Downloads and Documentation
- Part of a complete IP solution including xHCI host and device controllers, PHYs, verification IP, 1 IP Prototyping Kits and IP software development kits
- Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
- USB-C 3.1 PHY IP supports USB Type-C specification
- Supports the SuperSpeedPlus (10 Gbps) and SuperSpeed (5 Gbps) speed modes
- Integrated PHY includes transmitter, receiver, PLL, digital core, and ESD
- Design minimizes area and power
| USB 3.1 PHY (10G/5G) - TSMC N3A x1 OTG, North/South Poly Orientation for Automotive AEC-Q100 Grade 2 | STARs |
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| USB-C 3.1/DP TX PHY for TSMC N7, North/South Poly Orientation for Automotive AEC-Q100 Grade 2 | STARs |
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| USB-C 3.1 SS/SSP PHY, Type-C - TSMC N5A 1.2V, North/South Poly Orientation for Automotive AEC-Q100 Grade 2 | STARs |
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| USB 3.1 PHY A00 (10G/5G) - SS SF5A x1 OTG, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - GF 22FD-SOI x1, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - SS 10LPP x1 OTG, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - SS 11LPP x1, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - SS 14LPP x1 OTG, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - SS SF4E x1 OTG, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - SS SF5 x1 OTG, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - SS 8LPP x1 OTG, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - TSMC 12FFC x1 OTG, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - TSMC 16FFC x1 OTG, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - TSMC 16FF+GL x1 OTG, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - TSMC 16FF+LL x1 OTG, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - TSMC N3P X1 OTG, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - TSMC N5 x1 OTG, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - TSMC 6FF x1 OTG, North/South Poly Orientation | STARs |
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| USB 3.1 PHY (10G/5G) - TSMC 7FF x1 OTG, North/South Poly Orientation | STARs |
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| USB-C 3.1/DP TX PHY for Samsung 11LPP, North/South Poly Orientation | STARs |
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| USB-C 3.1/DP TX PHY for Samsung 14LPP, North/South Poly Orientation | STARs |
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| USB-C 3.1/DP TX PHY for TSMC 12FFC, North/South Poly Orientation | STARs |
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| USB-C 3.1/DP TX PHY for TSMC 16FFC, North/South Poly Orientation | STARs |
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| USB-C 3.1/DP TX PHY for TSMC 7FF, North/South Poly Orientation | STARs |
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| USB-C 3.1 SS/SSP PHY, Type-C - TSMC 12FFC, North/South Poly Orientation | STARs |
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| USB-C 3.1 SS/SSP PHY, Type-C - TSMC 16FFC, North/South Poly Orientation | STARs |
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| USB-C 3.1 SS/SSP PHY, Type-C - TSMC N5, North/South Poly Orientation | STARs |
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| USB-C 3.1 SS/SSP PHY, Type-C - TSMC 6FF x1, North/South Poly Orientation | STARs |
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| USB-C 3.1 SS/SSP PHY, Type-C - TSMC 7FF x1, North/South Poly Orientation | STARs |
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| Description: |
USB 3.1 PHY (10G/5G) - SS 14LPP x1 OTG, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_ss14lppx1ns |
| Version: |
1.03d |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
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| Product Type: |
DesignWare Cores |
| Documentation: |
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Application Notes DesignWare Cores Consumer 10 USB 3.1 SS+ PHY ATE Test Bench for SS14LPP (PHY Version 1.03d) ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
17³Ô¹Ï PHY IP USB3.1 SSP PHY and Controller Integration Guide (Application Note Version 1.04a) ( PDF | HTML )
Databooks DesignWare Cores USB 3.1 SSP+ PHY for SS14LPP (PHY Version 1.03d) ( PDF | HTML )
USB 3.1 SuperSpeed Plus PCS for the DesignWare Cores USB 3.1 SuperSpeed Plus PHY for SS 14 LPP(1.03d) ( PDF | HTML )
Release Notes DesignWare Cores USB 3.1 SS+ PHY for SS14LPP Release Notes (PHY Version 1.03d) ( TEXT )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Download: |
dwc_usb31sspphy_ss14lppx1ns |
| Product Code: |
C894-0 |
| Description: |
USB 3.1 PHY (10G/5G) - GF 22FD-SOI x1, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_gf22fdsoix1ns |
| Version: |
2.02a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
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| Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores USB 3.1 SSP+ PHY ATE Test Bench for GF22 (Doc Version: 1.60) ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DesignWare Cores Consumer 10G USB 3.1 SS+ PHY for GF22FDSOI x1 (PHY Version: 2.02a) ( PDF | HTML )
USB3.1SSP+ PCS for the DesignWare Cores USB3.1SSP+ PHY (PCS Version 3.2.6) ( PDF | HTML )
Release Notes DesignWare Cores USB 3.1 SSP+ PHY x1 NS for GF22FDSOI 1.8V Release Notes (PHY Version: 2.02a) ( TEXT )
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| Download: |
dwc_usb31sspphy_gf22fdsoix1ns |
| Product Code: |
E800-0 |
| Description: |
USB 3.1 PHY (10G/5G) - SS 10LPP x1 OTG, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_ss10lppx1ns |
| Version: |
1.03c |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
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| Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores Consumer 10 USB 3.1 SS+ PHY ATE Test Bench for SS LPP ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
17³Ô¹Ï PHY IP USB3.1 SSP PHY and Controller Integration Guide (Application Note Version 1.04a) ( PDF | HTML )
Databooks DesignWare Cores USB 3.1 SS+ PHY for SS10LPP (PHY Version: 1.03c) ( PDF | HTML )
USB 3.1 SS+ PCS for the DesignWare Cores USB 3.1 SS+ PHY for SS LPP (1.00a) ( PDF | HTML )
Datasheet DesignWare SuperSpeed USB 3.1 IP Solution ( PDF )
Release Notes DesignWare Cores USB 3.1 SS+ PHY for SS10LPP Release Notes (PHY Version: 1.03c) ( TEXT )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
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| Download: |
USB3.1-SSPHY_SS_10LPP |
| Product Code: |
C895-0 |
| Description: |
USB 3.1 PHY (10G/5G) - SS 11LPP x1, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_ss11lppx1ns |
| Version: |
1.01c |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
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| Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores Consumer 10 USB 3.1 SS+ PHY ATE Test Bench for SS1LPP x1 (PHY Version: 1.01c) ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DesignWare Cores USB 3.1 SSP+ PHY for SS11LPP x1 ( PDF | HTML )
USB 3.1 SSP PCS for the DesignWare Cores USB 3.1 SSP PHY for SS11LPP (1.01c) ( PDF | HTML )
Release Notes DesignWare Cores USB 3.1 SSP+ PHY for SS11LPP Release Notes (PHY Version: 1.01c) ( TEXT )
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| Download: |
dwc_usb31sspphy_ss11lppx1ns |
| Product Code: |
D833-0 |
| Description: |
USB 3.1 PHY (10G/5G) - SS 8LPP x1 OTG, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_ss8lppx1ns |
| Version: |
1.00c |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
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| Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores Consumer 10 USB 3.1 SS+ PHY ATE Test Bench ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DesignWare Cores USB 3.1 SS+ PHY for SS 8 LPP Databook (PHY Version: 1.00c) ( PDF | HTML )
USB 3.1 SSP PCS for the DesignWare Cores USB 3.1 SSP PHY for SS11LPP (1.01c) ( PDF | HTML )
Release Notes DesignWare Cores USB 3.1 SS+ PHY for SS 8 LPP Release Notes (PHY Version: 1.00c) ( TEXT )
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| Download: |
dwc_usb31sspphy_ss8lppx1ns |
| Product Code: |
D838-0 |
| Description: |
USB 3.1 PHY (10G/5G) - SS SF4E x1 OTG, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_ss4lpex1ns |
| Version: |
3.07a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
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| Product Type: |
DesignWare Cores |
| Documentation: |
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Application Notes 17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DesignWare Cores USB 3.1 SS+ PHY Databook for Samsung 4LPE (PHY Version: 3.07a) ( PDF | HTML )
USB3.1SSP+ PCS for the DesignWare Cores USB3.1SSP+ PHY (PCS Version: 3.42a) ( PDF | HTML )
Release Notes DesignWare Cores USB 3.1 SSP+ PHY for SS4LPE 1.2V (PHY Version: 3.07a) ( TEXT )
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| Download: |
dwc_usb31sspphy_ss4lpex1ns |
| Product Code: |
F086-0 |
| Description: |
USB 3.1 PHY (10G/5G) - SS SF5 x1 OTG, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_ss5lpex1ns |
| Version: |
2.01g |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
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| Product Type: |
DesignWare Cores |
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Application Notes C10 Hardware Emulation Application Note ( PDF | HTML )
DesignWare Cores Consumer 10 USB 3.1 SS+ PHY ATE Test Bench for SS5LPE (Doc Version: 2.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DesignWare Cores Consumer 10G USB 3.1 SS+ PHY for SS5LPE Databook (PHY Version: 2.01g) ( PDF | HTML )
USB 3.1 SuperSpeed Plus PCS for the DesignWare Cores USB 3.1 SuperSpeed Plus PHY for SS5 LPE (PCS Version: 3.32a) ( PDF | HTML )
Release Notes DesignWare Cores Consumer USB3.1 SSP+ PHY x1 NS for SS5LPE 1.8V Release Notes (PHY Version: 2.01g) ( TEXT )
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| Download: |
dwc_usb31sspphy_ss5lpex1ns |
| Product Code: |
E878-0 |
| Description: |
USB 3.1 PHY (10G/5G) - TSMC 12FFC x1 OTG, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_tsmc12ffcx1ns |
| Version: |
1.07a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
| Documentation: |
Hide Documents...
Application Notes DesignWare? Cores USB 3.1 SS+ PHY ATE Test Bench ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
17³Ô¹Ï PHY IP USB3.1 SSP PHY and Controller Integration Guide (Application Note Version 1.04a) ( PDF | HTML )
Databooks DesignWare Cores USB 3.1 SS+ PHY Databook for TSMC12FFC (PHY Version: 1.07a) ( PDF | HTML )
USB 3.1 SSP+ PCS for the DesignWare? Cores USB 3.1 SSP+ PHY (3.52a) ( PDF | HTML )
Release Notes DesignWare Cores USB 3.1 SS+ PHY Release Notes for TSMC12FFC (PHY Version: 1.07a) ( TEXT )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Download: |
dwc_usb31sspphy_tsmc12ffcx1ns |
| Product Code: |
C609-0, F898-0, F900-0 |
| Description: |
USB 3.1 PHY (10G/5G) - TSMC 16FF+GL x1 OTG, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_tsmc16ffpglx1ns |
| Version: |
1.01a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
| Documentation: |
Hide Documents...
Application Notes SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP USB3.1 SSP PHY and Controller Integration Guide (Application Note Version 1.04a) ( PDF | HTML )
USB 3.1 PHY Integration Review Checklist for TSMC16 FFPGL ( PDF )
Databooks DesignWare Cores USB 3.1 SS+ PHY for TSMC 16 FFPGL ( PDF )
USB 3.1 SuperSpeed Plus PCS for the DesignWare Cores USB 3.1 SuperSpeed Plus PHY ( PDF )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Download: |
USB3.1-SSPHY_TSMC_16FFPGL |
| Product Code: |
B851-0 |
| Description: |
USB 3.1 PHY (10G/5G) - TSMC 16FF+LL x1 OTG, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_tsmc16ffpllx1ns |
| Version: |
1.01a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
| Documentation: |
Hide Documents...
Application Notes Consumer 10 USB 3.1 SS+ PHY ATE Test Bench ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP USB3.1 SSP PHY and Controller Integration Guide (Application Note Version 1.04a) ( PDF | HTML )
USB 3.1 PHY Integration Review Checklist for TSMC16 FFPLL ( PDF )
Databooks DesignWare Cores USB 3.1 SS+ PHY for TSMC 16 FFPLL ( PDF )
USB 3.1 SuperSpeed Plus PCS for the DesignWare Cores USB 3.1 SuperSpeed Plus PHY ( PDF )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Download: |
USB3.1-SSPHY_TSMC_16FFPLL |
| Product Code: |
B850-0 |
| Description: |
USB 3.1 PHY (10G/5G) - TSMC 16FFC x1 OTG, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_tsmc16ffcx1ns |
| Version: |
1.10a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
| Documentation: |
Hide Documents...
Application Notes DesignWare? Cores USB 3.1 SS+ PHY ATE Test Bench ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
17³Ô¹Ï PHY IP USB3.1 SSP PHY and Controller Integration Guide (Application Note Version 1.04a) ( PDF | HTML )
USB 3.1 PHY Integration Review Checklist for TSMC16 FFC ( PDF )
Databooks DesignWare Cores USB 3.1 SS+ PHY for TSMC16FFC Databook (PHY Version: 1.10a) ( PDF | HTML )
USB 3.1 SSP+ PCS for the DesignWare? Cores USB 3.1 SSP+ PHY (3.52a) ( PDF | HTML )
Release Notes DesignWare Cores USB 3.1 SS+ PHY for TSMC16FFC Release Notes (PHY Version: 1.10a) ( TEXT )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Download: |
dwc_usb31sspphy_tsmc16ffcx1ns |
| Product Code: |
B866-0 |
| Description: |
USB 3.1 PHY (10G/5G) - TSMC 6FF x1 OTG, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_tsmc6ffx1ns |
| Version: |
4.05a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
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Hide Documents...
Application Notes SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP Compilation Using the LC and FC End-User Platform (Doc Version: 1.11a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations Application Note (Doc Version: 1.00a) ( PDF | HTML )
Syopsys PHY IP USB 3.1 SSP+ PHY ATE Test Bench Application Note (Document Version: 2.20a) ( PDF | HTML )
Databooks 17³Ô¹Ï PHY IP USB 3.1 SSP+ PCS PHY/PCS Wrapper Databook (PCS Version: 3.54d) ( PDF | HTML )
17³Ô¹Ï PHY IP USB 3.1 SSP+ PHY for TSMC6FF Databook (PHY Version: 4.05a) ( PDF | HTML )
Reference Manual 17³Ô¹Ï PHY IP USB 3.1 SSP+ PHY for TSMC6FF Reference Manual (PHY Version: 4.05a) ( PDF | HTML )
Release Notes 17³Ô¹Ï PHY IP USB 3.1 SSP+ PHY for TSMC6FF Release Notes (PHY Version: 4.05a) ( TEXT )
|
| Download: |
dwc_usb31sspphy_tsmc6ffx1ns |
| Product Code: |
F408-0 |
| Description: |
USB 3.1 PHY (10G/5G) - TSMC 7FF x1 OTG, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_tsmc7ffx1ns |
| Version: |
4.05a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
| Documentation: |
Hide Documents...
Application Notes SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP Compilation Using the LC and FC End-User Platform (Doc Version: 1.11a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations Application Note (Doc Version: 1.00a) ( PDF | HTML )
17³Ô¹Ï PHY IP USB3.1 SSP PHY and Controller Integration Guide (Application Note Version 1.04a) ( PDF | HTML )
Syopsys PHY IP USB 3.1 SSP+ PHY ATE Test Bench Application Note (Document Version: 2.20a) ( PDF | HTML )
Databooks 17³Ô¹Ï PHY IP USB 3.1 SS+ PHY for TSMC7FF Databook (PHY Version: 4.05a) ( PDF | HTML )
17³Ô¹Ï PHY IP for the USB3.1 SSP+ PCS PHY/PCS Wrapper Databook (PCS Version: 3.54e) ( PDF | HTML )
Reference Manual 17³Ô¹Ï PHY IP USB 3.1 SS+ PHY for TSMC7FF Reference Manual (PHY Version: 4.05a) ( PDF | HTML )
Release Notes 17³Ô¹Ï PHY IP USB 3.1 SS+ PHY for TSMC7FF Release Notes (PHY Version: 4.05a) ( TEXT )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Download: |
dwc_usb31sspphy_tsmc7ffx1ns |
| Product Code: |
C389-0 |
| Description: |
USB 3.1 PHY (10G/5G) - TSMC N3P X1 OTG, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_tsmc3pffx1ns |
| Version: |
4.50a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
| Documentation: |
Hide Documents...
Application Notes SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï Compilation Using the LC and FC End-User Platform (Doc Version: 2022.03) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 2.00b) ( PDF | HTML )
17³Ô¹Ï PHY IP USB 3.1 SSP+ PHY ATE Testbench Application Note (Document Version: 0.30a) ( PDF | HTML )
Databooks 17³Ô¹Ï PHY IP USB 3.1 SSP+ PHY for TSMC N3P Databook (PHY Version: 4.50a) ( PDF | HTML )
USB 3.1 SSP+ PCS for the USB 3.1 SSP+ PHY (PCS Version: 2.08d) ( PDF | HTML )
Reference Manual 17³Ô¹Ï PHY IP USB 3.1 SSP+ PHY for TSMC N3P Reference Manual (PHY Version: 4.50a) ( PDF | HTML )
Release Notes 17³Ô¹Ï PHY IP USB 3.1 SSP+ PHY for TSMC N3P 1.2V Release Notes (PHY Version: 4.50a) ( TEXT )
User Guide 17³Ô¹Ï PHY IP USB3.1 SSP+ PHY coreKit User Guide (Doc Version: 0.10d) ( PDF | HTML )
|
| Download: |
dwc_usb31sspphy_tsmc3pffx1ns |
| Product Code: |
G242-0 |
| Description: |
USB 3.1 PHY (10G/5G) - TSMC N5 x1 OTG, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_tsmc5ffx1ns |
| Version: |
4.01c |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
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| Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores USB 3.1 SSP+ PHY ATE Test Bench (Doc Version: 1.90a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DesignWare Cores Consumer 10G USB 3.1 SSP+ PHY for TSMC5FF Databook (PHY Version: 4.01c) ( PDF | HTML )
USB3.1SSP+ PCS for the DesignWare Cores USB3.1SSP+ PHY (PCS Version: 3.55a) ( PDF | HTML )
Reference Manual DesignWare Cores Consumer 10G USB 3.1 SSP+ PHY for TSMC5FF Reference Manual (PHY Version: 4.01a) ( PDF | HTML )
Release Notes DWC USB3.1 SSP PHY x1 NS for TSMC5FF 1.2V Release Notes (PHY Version: 4.01c) ( TEXT )
|
| Download: |
dwc_usb31sspphy_tsmc5ffx1ns |
| Product Code: |
E504-0 |
| Description: |
USB 3.1 PHY A00 (10G/5G) - SS SF5A x1 OTG, North/South Poly Orientation |
| Name: |
dwc_usb31sspphy_a00_ss5lpex1ns |
| Version: |
2.04c |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
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DesignWare Cores |
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Application Notes DesignWare Cores Consumer 10 USB 3.1 SS+ PHY ATE Test Bench for SS5LPE (Doc Version: 2.00a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DesignWare Cores USB 3.1 SSP+ PHY for SS5LPE (PHY Version: 2.04c) ( PDF | HTML )
USB 3.1 SuperSpeed Plus PCS for the DesignWare Cores USB 3.1 SuperSpeed Plus PHY (PCS Version: 3.23a) ( PDF )
USB 3.1 SuperSpeed Plus PCS for the DesignWare Cores USB 3.1 SuperSpeed Plus PHY for SS5 LPE (PCS Version: 3.23a) ( HTML )
Reference Manual DesignWare Cores USB 3.1 SSP+ PHY for SS5LPE ( PDF | HTML )
Release Notes DesignWare Cores USB 3.1 SSP+ PHY for SS5LPE Release Notes (PHY Version: 2.04c) ( TEXT )
|
| Download: |
dwc_usb31sspphy_a00_ss5lpex1ns |
| Product Code: |
H863-0 |
| Description: |
USB-C 3.1 SS/SSP PHY, Type-C - TSMC 12FFC, North/South Poly Orientation |
| Name: |
dwc_usbc31sspphy_tsmc12ffcns |
| Version: |
1.07a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
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| Product Type: |
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Hide Documents...
Application Notes SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
USBC 3.1 SS+ PHY ATE Test Bench (1.50a) ( HTML )
Databook DesignWare Cores Type-C USB 3.1 SS+ PHY for TSMC12FFC Databook (PHY Version: 1.07a) ( PDF | HTML )
Release Notes DesignWare Cores Type-C USB 3.1 SS+ PHY for TSMC12FFC Release Notes (PHY Version: 1.07a) ( TEXT )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Download: |
dwc_usbc31sspphy_tsmc12ffcns |
| Product Code: |
C642-0 |
| Description: |
USB-C 3.1 SS/SSP PHY, Type-C - TSMC 16FFC, North/South Poly Orientation |
| Name: |
dwc_usbc31sspphy_tsmc16ffcns |
| Version: |
1.10a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
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| Product Type: |
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Application Notes SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
USBC 3.1 SS+ PHY ATE Test Bench (1.50a) ( HTML )
Databooks DesignWare Cores Type-C USB 3.1 SS+ PHY for TSMC16FFC Databook (PHY Version 1.10a) ( PDF | HTML )
USBC 3.1 SS+ PCS for the DesignWare Cores USBC 3.1 SS+ PHY (3.52a) ( PDF | HTML )
Release Notes DesignWare Cores Type-C USB 3.1 SS+ PHY for TSMC16FFC Release Notes (PHY Version: 1.10a) ( TEXT )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Download: |
dwc_usbc31sspphy_tsmc16ffcns |
| Product Code: |
C235-0 |
| Description: |
USB-C 3.1 SS/SSP PHY, Type-C - TSMC 6FF x1, North/South Poly Orientation |
| Name: |
dwc_usbc31sspphy_tsmc6ffx1ns |
| Version: |
4.05a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
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Application Notes SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP Compilation Using the LC and FC End-User Platform (Doc Version: 1.11a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations Application Note (Doc Version: 1.00a) ( PDF | HTML )
17³Ô¹Ï PHY IP USBC 3.1 SSP+ PHY ATE Test Bench (Doc Version: 1.60a) ( PDF | HTML )
Databooks 17³Ô¹Ï PHY IP Type-C USB 3.1 SS+ PHY for TSMC6FF x1 (PHY Version: 4.05a) ( PDF | HTML )
17³Ô¹Ï PHY IP Type-C USB3.1SSP+ PCS PHY/PCS Wrapper Databook (PCS Version: 3.54b) ( PDF | HTML )
Reference Manual 17³Ô¹Ï PHY IP Type-C USB 3.1 SS+ PHY for TSMC6FF x1 Reference Manual (PHY Version: 4.05a) ( PDF | HTML )
Release Notes 17³Ô¹Ï PHY IP Type-C USB 3.1 SS+ PHY for TSMC6FF Release Notes (PHY Ver: 4.05a) ( TEXT )
|
| Download: |
dwc_usbc31sspphy_tsmc6ffx1ns |
| Product Code: |
G032-0 |
| Description: |
USB-C 3.1 SS/SSP PHY, Type-C - TSMC 7FF x1, North/South Poly Orientation |
| Name: |
dwc_usbc31sspphy_tsmc7ffx1ns |
| Version: |
4.03a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
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DesignWare Cores |
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Application Notes DesignWare Cores USBC 3.1 SSP+ PHY ATE Test Bench (Doc Version: 1.40a) ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DesignWare Cores Type-C USB 3.1 SS+ PHY for TSMC7FF (PHY Version: 4.03a) ( PDF | HTML )
Type-C USB3.1SSP+ PCS for the DesignWare Cores Type-C USB3.1SSP+ PHY (PCS Version: 3.54a) ( PDF | HTML )
Release Notes DesignWare Cores Type-C USB 3.1 SS+ PHY for TSMC7FF Release Notes (PHY Ver: 4.03a) ( TEXT )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Download: |
dwc_usbc31sspphy_tsmc7ffx1ns |
| Product Code: |
C390-0 |
| Description: |
USB-C 3.1 SS/SSP PHY, Type-C - TSMC N5, North/South Poly Orientation |
| Name: |
dwc_usbc31sspphy_tsmc5ffns |
| Version: |
4.01c |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
| Documentation: |
Hide Documents...
Application Notes DesignWare Cores USBC 3.1 SSP+ PHY ATE Test Bench (Doc Version: 1.40a) ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DesignWare Cores Type-C USB3.1SS+ PHY Databook for TSMC5FF Databook (PHY Version: 4.01c) ( PDF | HTML )
Type-C USB3.1SSP+ PCS for the DesignWare Cores Type-C USB3.1SSP+ PHY (PCS Version: 3.55a) ( PDF | HTML )
Reference Manual DesignWare Cores Type-C USB3.1SS+ PHY Databook for TSMC5FF Reference Manual (PHY Version: 4.01c) ( PDF | HTML )
Release Notes DWC USBC3.1 SSP+ PHY NS for TSMC5FF 1.2V Release Notes (PHY Version: 4.01c) ( TEXT )
|
| Download: |
dwc_usbc31sspphy_tsmc5ffns |
| Product Code: |
E746-0 |
| Description: |
USB-C 3.1 SS/SSP PHY, Type-C - TSMC N5A 1.2V, North/South Poly Orientation for Automotive AEC-Q100 Grade 2 |
| Name: |
dwc_ag_usbc31sspphy_tsmc5aff12ns |
| Version: |
4.14a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
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Hide Documents...
Application Notes SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP Consumer 10G Compilation Using the LC and FC End-User Platform (Doc Version: 1.10a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations Application Note (Doc Version: 1.00a) ( PDF | HTML )
17³Ô¹Ï PHY IP Type-C USB3.1 SSP+ PHY ATE Testbench Application Note (Doc Version: 1.80a) ( PDF | HTML )
Databooks 17³Ô¹Ï PHY IP Type-C USB 3.1 SSP+ PCS PHY/PCS Wrapper Databook (PCS Version: 3.55e) ( PDF | HTML )
17³Ô¹Ï PHY IP Type-C USB 3.1 SSP+ for TSMC5AFF Databook for Automotive Grade, Grade 2 (AG2) PHY Databook (PHY Version: 4.14a) ( PDF | HTML )
Reference Manual 17³Ô¹Ï PHY IP Type-C USB 3.1 SSP+ for TSMC5AFF Databook for Automotive Grade, Grade 2 (AG2) Reference Manual (PHY Version: 4.14a) ( PDF | HTML )
Release Notes 17³Ô¹Ï PHY IP Type-C USB 3.1 SSP+ for TSMC5AFF Databook for Automotive Grade, Grade 2 (AG2) Release Notes (PHY Version: 4.14a) ( TEXT )
|
| Download: |
dwc_ag_usbc31sspphy_tsmc5aff12ns |
| Product Code: |
H485-0 |
| Description: |
USB-C 3.1/DP TX PHY for Samsung 11LPP, North/South Poly Orientation |
| Name: |
dwc_usbc31dptxphy_ss11lppns |
| Version: |
1.03b |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores Type-C USB 3.1 SS+ / DP Alt PHY ATE Test Bench for SS11LPP (PHY Version: 1.03b) ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DesignWare Cores Type-C USB 3.1 SS+ / DP Alt PHY for SS 11LPP (PHY Version: 1.03b) ( PDF | HTML )
Type-C USB3.1SSP+ / DP Alt PCS for the DesignWare Cores Type-C USB3.1SSP+ / DP Alt PHY for SS11LPP (1.03b) ( PDF | HTML )
Release Notes Type-C USB 3.1 / DP PHY X4 NS for SS 11LPP 1.8V Release Notes (PHY Version: 1.03b) ( TEXT )
|
| Download: |
dwc_usbc31dptxphy_ss11lppns |
| Product Code: |
D834-0 |
| Description: |
USB-C 3.1/DP TX PHY for Samsung 14LPP, North/South Poly Orientation |
| Name: |
dwc_usbc31dptxphy_ss14lppx4ns |
| Version: |
1.05a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
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Hide Documents...
Application Notes SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations Application Note (Doc Version: 2.00a) ( PDF | HTML )
17³Ô¹Ï PHY IP Type-C USB3.1 SS+ DP Alt PHY ATE Testbench Application Note (Doc Version: 1.60a) ( PDF | HTML )
Databooks 17³Ô¹Ï PHY IP DP AUX PHY for SS14LPP 1.8 V Databook (PHY Version: 1.05a) ( PDF | HTML )
17³Ô¹Ï PHY IP Type-C USB3.1 SS+ DP Alt PHY for SS14LPP Databook (PHY Version: 1.05a) ( PDF | HTML )
17³Ô¹Ï PHY IP Type-C USB3.1SSP+ / DP Alt PCS PHY/PCS Wrapper Databook (PCS Version: 3.15a) ( PDF | HTML )
Reference Manual 17³Ô¹Ï PHY IP Type-C USB3.1 SS+ DP Alt PHY for SS14LPP Reference Manual (PHY Version: 1.05a) ( PDF | HTML )
Release Notes Type-C USB 3.1 DPPHY for SS 14LPP 1.8V Release Notes (PHY Version: 1.05a) ( TEXT )
|
| Download: |
dwc_usbc31dptxphy_ss14lppx4ns |
| Product Code: |
E042-0 |
| Description: |
USB-C 3.1/DP TX PHY for TSMC 12FFC, North/South Poly Orientation |
| Name: |
dwc_usbc31dptxphy_tsmc12ffcns |
| Version: |
1.07a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
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Subscribe for Notifications |
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Application Notes DesignWare Cores Consumer Type-C USB3.1SS+/DP Alt PHY ATE Test Bench (Version: 1.50a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DesignWare Cores DP AUX PHY for TSMC 12FFC (PHY Version: 1.07a) ( PDF | HTML )
17³Ô¹Ï PHY IP Type-C USB 3.1 SS+ / DP Alt PHY for TSMC 12FFC (PHY Version: 1.07a_d2) ( PDF | HTML )
Type-C - USB3.1SSP+ / DP Alt PCS for the DesignWare Cores Type-C - USB3.1SSP+ / DP Alt PHY for TSMC12FFC (1.07a) ( PDF | HTML )
Release Notes Type-C USB 3.1 DP PHY x4 NS for TSMC 12FFC 1.8V Release Notes (1.07a) ( TEXT )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Download: |
dwc_usbc31dptxphy_tsmc12ffcns |
| Product Code: |
C455-0 |
| Description: |
USB-C 3.1/DP TX PHY for TSMC 16FFC, North/South Poly Orientation |
| Name: |
dwc_usbc31dptxphy_tsmc16ffcx4ns |
| Version: |
1.10a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
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Subscribe for Notifications |
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DesignWare Cores |
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Application Notes DP AUX/AUX-I2C PHY INTEGRATION REVIEW CHECKLIST for TSMC16FFC (1.0) ( PDF )
DesignWare Cores Consumer Type-C USB3.1SS+/DP Alt PHY ATE Test Bench (Version: 1.50a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
USB 3.1/DP Alt PHY Integration Review Checklist for TSMC16 FFC ( PDF )
Databooks DesignWare Cores DP AUX PHY for TSMC16FFC (PHY Version: 1.10a) ( PDF | HTML )
DesignWare Cores Type-C USB 3.1 SS+ / DP Alt PHY X4 for TSMC 16FFC (PHY Version: 1.10a_d1) ( PDF | HTML )
USBC 3.1 SS+ PCS for the DesignWare Cores USBC 3.1 SS+ PHY (3.52a) ( PDF | HTML )
Release Notes Type-C USB3.1 SS+ / DP Alt PHY x4 for TSMC 16FFC Release Notes (PHY Version: 1.10a) ( TEXT )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Download: |
dwc_usbc31dptxphy_tsmc16ffcx4ns |
| Product Code: |
C009-0 |
| Description: |
USB-C 3.1/DP TX PHY for TSMC 7FF, North/South Poly Orientation |
| Name: |
dwc_usbc31dptxphy_tsmc7ffns |
| Version: |
4.05a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
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Hide Documents...
Application Notes SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï PHY IP Compilation Using the LC and FC End-User Platform (Doc Version: 1.11a) ( PDF | HTML )
17³Ô¹Ï PHY IP Consumer 10G Type-C USB 3.1 DP PHY ATE Testbench Application Note (Doc Version: 1.90b) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations Application Note (Doc Version: 1.00a) ( PDF | HTML )
Databooks 17³Ô¹Ï PHY IP DP AUX-I2C PHY for TSMC7FF 1.8 V (PHY Version: 4.05a) ( PDF | HTML )
17³Ô¹Ï PHY IP Type-C USB 3.1SSP+ / DP Alt PHY for TSMC7FF Databook (PHY Version: 4.05a) ( PDF | HTML )
17³Ô¹Ï PHY IP Type-C USB3.1SSP+ / DP Alt PCS PHY/PCS Wrapper Databook (PCS Version: 3.54c) ( PDF | HTML )
Reference Manual 17³Ô¹Ï PHY IP Type-C USB 3.1SSP+ / DP Alt PHY for TSMC7FF Reference Manual (PHY Version: 4.05a) ( PDF | HTML )
Release Notes 17³Ô¹Ï PHY IP Type-C USB 3.1SSP+ / DP Alt PHY for TSMC7FF Release Notes (PHY Version: 4.05a) ( TEXT )
White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF )
USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF )
|
| Download: |
dwc_usbc31dptxphy_tsmc7ffns |
| Product Code: |
C391-0 |
| Description: |
USB-C 3.1/DP TX PHY for TSMC N7, North/South Poly Orientation for Automotive AEC-Q100 Grade 2 |
| Name: |
dwc_ag_usbc31dptxphy_tsmc7ffns |
| Version: |
4.03d |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores Type-C USB 3.1 DP PHY ATE Test Bench (Doc Version: 1.71a) ( PDF | HTML )
High Speed SerDes Gate-Level Simulations Application Note (Doc Version: 2.00a) ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.70a) ( PDF | HTML )
17³Ô¹Ï Compilation Using the LC and FC End-User Platform (Doc Version: 2022.03) ( PDF | HTML )
17³Ô¹Ï PHY IP High Speed SerDes Gate-Level Simulations (Doc Version: 1.12a) ( PDF | HTML )
Databooks DesignWare Cores DP AUX-I2C PHY for Automotive (AG) TSMC7FF 1.8V (PHY Version: 4.03d) ( PDF | HTML )
17³Ô¹Ï PHY IP Type-C USB3.1 SSP+ / DP Alt PHY for Automotive Grade 2 TSMC7FF (PHY Version: 4.03d) ( PDF | HTML )
Type-C USB3.1SSP+ / DP Alt PCS for the DesignWare Cores Type-C - USB3.1SSP+ / DP Alt PHY (PCS Version: 3.52g) ( PDF | HTML )
Reference Manual 17³Ô¹Ï PHY IP Type-C USB3.1 SSP+ / DP Alt PHY for Automotive Grade 2 TSMC7FF Reference Manual (PHY Version: 4.03d) ( PDF | HTML )
Release Notes DesignWare Cores Type-C USB3.1/DP PHY NS for TSMC7FF 1.8V Release Notes (PHY Version: 4.03d) ( TEXT )
|
| Download: |
dwc_ag_usbc31dptxphy_tsmc7ffns |
| Product Code: |
I434-0 |
